Automatisierte VHDL-Code-Generierung eines Delta-Sigma Modulators
نویسندگان
چکیده
منابع مشابه
Decrease in Hardware Consumption and Quantization Noise of Digital Delta-Sigma Modulators and Implementation by VHDL
A new structure is presented for digital delta-sigma modulator (DDSM). Novel architecture decreases hardware consumption, output quantization noise and spurs in Comparison to previous architectures. In order to reduce the delay, power consumption and increase maximum working frequency, the pipelining technique and the carry skip adder are used. Simulation proposed architecture shows that the qu...
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ژورنال
عنوان ژورنال: Advances in Radio Science
سال: 2006
ISSN: 1684-9973
DOI: 10.5194/ars-4-319-2006